OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [orp/] - Rev 1193

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'		 dries 7624d 22h /or1k/trunk/orp/
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7624d 23h /or1k/trunk/orp/
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7624d 23h /or1k/trunk/orp/
1176 Added comments. damonb 7688d 03h /or1k/trunk/orp/
1158 Added simple uart test case. lampret 7767d 08h /or1k/trunk/orp/
1157 Added syscall test case. lampret 7767d 08h /or1k/trunk/orp/
1156 Tick timer test case added. lampret 7768d 04h /or1k/trunk/orp/
1141 WB = 1/2 RISC clock test code enabled. lampret 7782d 10h /or1k/trunk/orp/
1138 Added some information how to run simulations. lampret 7783d 05h /or1k/trunk/orp/
1137 Added RFRAM generic and Altera lpm library. lampret 7783d 05h /or1k/trunk/orp/
1136 Add altera lpm library. lampret 7783d 05h /or1k/trunk/orp/
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7783d 05h /or1k/trunk/orp/
1134 Changed location of debug test code to 0. lampret 7783d 05h /or1k/trunk/orp/
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7783d 05h /or1k/trunk/orp/
1125 This test case passes. lampret 7804d 11h /or1k/trunk/orp/
1105 Added WB b3 signals lampret 7902d 22h /or1k/trunk/orp/
1096 An example of SW and RTL regression log because many people asked for. lampret 7914d 07h /or1k/trunk/orp/
1094 sys/time.h might not be available for or1k target lampret 7915d 05h /or1k/trunk/orp/
1093 New UART rx/tx fiel settings (due to or1ksim upgrade) lampret 7915d 05h /or1k/trunk/orp/
1092 Changed from or32-rtems toolchain to or32-uclinux. lampret 7915d 05h /or1k/trunk/orp/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.