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[/] [or1k/] [trunk/] [orp/] [orp_soc/] - Rev 1134

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Rev Log message Author Age Path
1134 Changed location of debug test code to 0. lampret 7783d 08h /or1k/trunk/orp/orp_soc/
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7783d 08h /or1k/trunk/orp/orp_soc/
1125 This test case passes. lampret 7804d 14h /or1k/trunk/orp/orp_soc/
1105 Added WB b3 signals lampret 7903d 01h /or1k/trunk/orp/orp_soc/
1096 An example of SW and RTL regression log because many people asked for. lampret 7914d 10h /or1k/trunk/orp/orp_soc/
1094 sys/time.h might not be available for or1k target lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1093 New UART rx/tx fiel settings (due to or1ksim upgrade) lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1092 Changed from or32-rtems toolchain to or32-uclinux. lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1091 Added mmu test. lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1090 Removed ic_invalidate lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1089 Added dhrystone 2.1 benchmark lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1088 Changed from or32-rtems toolchain to or32-uclinux. lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1087 Changed or32-rtems to or32-uclinux. lampret 7915d 08h /or1k/trunk/orp/orp_soc/
1057 Different memory controller. simons 7985d 13h /or1k/trunk/orp/orp_soc/
1052 Delayed wb_err_o. Disabled wb_ack_o when wb_err_o is asserted. lampret 7986d 07h /or1k/trunk/orp/orp_soc/
991 Different memory controller. simons 8011d 16h /or1k/trunk/orp/orp_soc/
990 Test is now complete. simons 8011d 17h /or1k/trunk/orp/orp_soc/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8014d 11h /or1k/trunk/orp/orp_soc/
983 First checkin lampret 8014d 14h /or1k/trunk/orp/orp_soc/
982 Moved to sim/bin lampret 8014d 14h /or1k/trunk/orp/orp_soc/

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