URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [orp/] [orp_soc/] [sim/] - Rev 1096

Rev	Log message	Author	Age	Path
1096	An example of SW and RTL regression log because many people asked for.	lampret	7885d 20h	/or1k/trunk/orp/orp_soc/sim/
1087	Changed or32-rtems to or32-uclinux.	lampret	7886d 19h	/or1k/trunk/orp/orp_soc/sim/
983	First checkin	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
982	Moved to sim/bin	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
981	First checkin.	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
980	Removed sim.tcl that shouldn't be here.	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
979	Removed old test case binaries.	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
976	Added store buffer	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
975	First checkin	lampret	7986d 00h	/or1k/trunk/orp/orp_soc/sim/
961	uart16550 RTL files renamed/added/removed.	lampret	7989d 14h	/or1k/trunk/orp/orp_soc/sim/
952	Added or1200_monitor top.	lampret	7992d 15h	/or1k/trunk/orp/orp_soc/sim/
951	Updated file names	lampret	7992d 15h	/or1k/trunk/orp/orp_soc/sim/
950	Removed nop.log. Added general.log and lookup.log. In the middle of moving test cases.	lampret	7992d 15h	/or1k/trunk/orp/orp_soc/sim/
843	Sample flash contents.	lampret	8093d 08h	/or1k/trunk/orp/orp_soc/sim/
783	Added sim directory and sub files/dirs.	lampret	8129d 00h	/or1k/trunk/orp/orp_soc/sim/