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[/] [or1k_old/] [trunk/] [orp/] - Rev 1287

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Rev Log message Author Age Path
1287 Added test case for l.cust5 custom instructions lampret 7363d 15h /or1k_old/trunk/orp/
1271 Merged branch_qmem into main tree. lampret 7398d 02h /or1k_old/trunk/orp/
1270 Merged branch_qmem into main tree. lampret 7398d 02h /or1k_old/trunk/orp/
1268 Merged branch_qmem into main tree. lampret 7398d 02h /or1k_old/trunk/orp/
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it		 dries 7603d 23h /or1k_old/trunk/orp/
1195 made the project file a little bit more universal dries 7604d 02h /or1k_old/trunk/orp/
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'		 dries 7604d 02h /or1k_old/trunk/orp/
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7604d 03h /or1k_old/trunk/orp/
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7604d 04h /or1k_old/trunk/orp/
1176 Added comments. damonb 7667d 07h /or1k_old/trunk/orp/
1158 Added simple uart test case. lampret 7746d 12h /or1k_old/trunk/orp/
1157 Added syscall test case. lampret 7746d 13h /or1k_old/trunk/orp/
1156 Tick timer test case added. lampret 7747d 09h /or1k_old/trunk/orp/
1141 WB = 1/2 RISC clock test code enabled. lampret 7761d 14h /or1k_old/trunk/orp/
1138 Added some information how to run simulations. lampret 7762d 09h /or1k_old/trunk/orp/
1137 Added RFRAM generic and Altera lpm library. lampret 7762d 09h /or1k_old/trunk/orp/
1136 Add altera lpm library. lampret 7762d 09h /or1k_old/trunk/orp/
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7762d 09h /or1k_old/trunk/orp/
1134 Changed location of debug test code to 0. lampret 7762d 09h /or1k_old/trunk/orp/
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7762d 09h /or1k_old/trunk/orp/

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