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Rev Log message Author Age Path
10 Ho ho, better circuit homer.xing 4530d 08h /pairing/
9 Add constrains file for ISE homer.xing 4531d 12h /pairing/
8 Finished Tate Pairing. Ha ha ha homer.xing 4531d 13h /pairing/
7 Finish inversion @ f33m homer.xing 4539d 18h /pairing/
6 add testbench for $f33m$. homer.xing 4540d 17h /pairing/
5 rename director : verilog/ -> rtl/ homer.xing 4540d 17h /pairing/
4 add testbench homer.xing 4541d 15h /pairing/
3 finish Duursma Lee algorithm. doing f33m module homer.xing 4541d 15h /pairing/
2 upload code for Duursma-Lee algorithm. I am still developing them. homer.xing 4542d 15h /pairing/
1 The project and the structure was created root 4542d 15h /pairing/

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