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[/] [pci/] [tags/] [asyst_2/] - Rev 86

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Rev	Log message	Author	Age	Path
86	Entered the option to disable no response counter in wb master.	mihad	7842d 00h	/pci/tags/asyst_2/
85	Changed Vendor ID defines.	mihad	7842d 05h	/pci/tags/asyst_2/
84	Changed vendor ID.	mihad	7845d 23h	/pci/tags/asyst_2/
83	Cleaned up the code. No functional changes.	mihad	7870d 22h	/pci/tags/asyst_2/
81	Updated synchronization in top level fifo modules.	mihad	7884d 18h	/pci/tags/asyst_2/
79	Updated.	mihad	7887d 23h	/pci/tags/asyst_2/
78	Old files with wrong names removed.	mihad	7887d 23h	/pci/tags/asyst_2/
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7887d 23h	/pci/tags/asyst_2/
76	TRDY output delay was 10 instead of 11. Repaired.	mihad	7890d 23h	/pci/tags/asyst_2/
75	Include statement moved out of off/on pragma as reported by Uwe.	mihad	7894d 00h	/pci/tags/asyst_2/
73	Bug fixes, testcases added.	mihad	7894d 00h	/pci/tags/asyst_2/
72	* empty log message *	mihad	7941d 04h	/pci/tags/asyst_2/
71	Changed the code a bit to make it more readable. Functionality not changed in any way. More robust synchronization in fifos is still pending.	mihad	7948d 19h	/pci/tags/asyst_2/
69	Changed BIST signal names etc..	mihad	7986d 03h	/pci/tags/asyst_2/
68	Changed wrong signal name scanb_sen into scanb_en.	tadejm	7989d 12h	/pci/tags/asyst_2/
67	Changed BIST signals for RAMs.	tadejm	7989d 17h	/pci/tags/asyst_2/
66	Changed empty status generation in pciw_fifo_control.v	mihad	7993d 04h	/pci/tags/asyst_2/
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7996d 02h	/pci/tags/asyst_2/
64	The testcase I just added in previous revision repaired	mihad	7996d 04h	/pci/tags/asyst_2/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7996d 06h	/pci/tags/asyst_2/

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[/] [pci/] [tags/] [asyst_2/] - Rev 86

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