OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [asyst_3/] - Rev 134

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
134 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7513d 06h /pci/tags/asyst_3/
132 Compact PCI Hot Swap support added.
New testcases added.
Specification updated.
Test application changed to support WB B3 cycles.
mihad 7513d 06h /pci/tags/asyst_3/
131 Moved top.v to bench directory. Removed unneeded meta_flop,
modified files list files accordingly.
mihad 7517d 05h /pci/tags/asyst_3/
130 The wbs B3 to B2 translation logic had wrong reset wire connected! mihad 7522d 05h /pci/tags/asyst_3/
128 Some warning cleanup. simons 7523d 08h /pci/tags/asyst_3/
126 ifdef - endif statements put in separate lines for flint compatibility. simons 7531d 01h /pci/tags/asyst_3/
124 Added missing signals to 2 sensitivity lists. Everything works the same as before. tadejm 7569d 08h /pci/tags/asyst_3/
122 mbist signals updated according to newest convention markom 7576d 08h /pci/tags/asyst_3/
119 Added support for WB B3. Some testcases were updated. tadejm 7632d 20h /pci/tags/asyst_3/
118 Some minor changes due to changes in core. tadejm 7632d 20h /pci/tags/asyst_3/
117 WB Master is now WISHBONE B3 compatible. tadejm 7632d 20h /pci/tags/asyst_3/
116 Corrected bug when writing to FIFO (now it is registered). tadejm 7632d 20h /pci/tags/asyst_3/
115 Added signals for WB Master B3. tadejm 7632d 20h /pci/tags/asyst_3/
113 ifdefs moved to thier own lines, this confuses some of the tools. simons 7639d 23h /pci/tags/asyst_3/
111 synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated. simons 7640d 04h /pci/tags/asyst_3/
110 Module that converts slave WISHBONE B3 accesses to
WISHBONE B2 accesses with CAB.
mihad 7642d 03h /pci/tags/asyst_3/
109 There was missing path to hdl.var file. tadejm 7646d 01h /pci/tags/asyst_3/
108 Added 'three_left_out' to pci_pciw_fifo signaling three locations before full. Added comparison between current registered cbe and next unregistered cbe to signal wb_master whether it is allowed to performe burst or not. Due to this, I needed 'three_left_out' so that writing to pci_pciw_fifo can be registered, otherwise timing problems would occure. tadejm 7646d 01h /pci/tags/asyst_3/
107 Added status when checking disconnect with or without data. Before it was only retry, now there is stop and retry. tadejm 7646d 01h /pci/tags/asyst_3/
106 Added limited WISHBONE B3 support for WISHBONE Slave Unit.
Doesn't support full speed bursts yet.
mihad 7650d 23h /pci/tags/asyst_3/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.