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[/] [pci/] [tags/] [rel_1/] - Rev 46

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Rev Log message Author Age Path
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 8021d 23h /pci/tags/rel_1/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8023d 05h /pci/tags/rel_1/
44 Added for testing of Configuration Cycles Type 1 mihad 8023d 05h /pci/tags/rel_1/
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 8023d 05h /pci/tags/rel_1/
42 Removed out of date files mihad 8035d 06h /pci/tags/rel_1/
40 From these Wrod files PDF were created - added future improvements tadej 8113d 20h /pci/tags/rel_1/
39 File not needed tadej 8113d 21h /pci/tags/rel_1/
38 This file is not needed tadej 8114d 00h /pci/tags/rel_1/
37 These files are not needed any more tadej 8114d 00h /pci/tags/rel_1/
36 *** empty log message *** tadej 8114d 01h /pci/tags/rel_1/
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8168d 08h /pci/tags/rel_1/
34 Added missing include statements mihad 8183d 06h /pci/tags/rel_1/
33 Added some testcases, removed un-needed fifo signals mihad 8184d 04h /pci/tags/rel_1/
32 Added include statement that was missing and causing errors mihad 8192d 00h /pci/tags/rel_1/
31 User defined constants used for Test Application tadej 8194d 19h /pci/tags/rel_1/
30 Example of PCI testbench log file mihad 8195d 04h /pci/tags/rel_1/
29 Xilinx synthesys log file tadej 8195d 06h /pci/tags/rel_1/
28 pci/doc/pci_databook.pdf tadej 8196d 01h /pci/tags/rel_1/
27 Modified testbench and fixed some bugs mihad 8197d 23h /pci/tags/rel_1/
26 Modified testbench and fixed some bugs mihad 8197d 23h /pci/tags/rel_1/

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