URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_1/] [rtl/] - Rev 60

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7975d 00h	/pci/tags/rel_1/rtl/
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7975d 01h	/pci/tags/rel_1/rtl/
58	Removed all logic from asynchronous reset network	mihad	7980d 02h	/pci/tags/rel_1/rtl/
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7980d 08h	/pci/tags/rel_1/rtl/
56	Number of state bits define was removed	mihad	7980d 22h	/pci/tags/rel_1/rtl/
55	Changed state machine encoding to true one-hot	mihad	7980d 23h	/pci/tags/rel_1/rtl/
53	Updated for synthesis purposes. Gate level simulation was failing in some configurations	mihad	8014d 04h	/pci/tags/rel_1/rtl/
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	8014d 08h	/pci/tags/rel_1/rtl/
50	Got rid of undef directives	mihad	8017d 01h	/pci/tags/rel_1/rtl/
49	Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives	mihad	8017d 01h	/pci/tags/rel_1/rtl/
48	Extracted distributed RAM module from wb/pci_tpram.v to its own file	mihad	8017d 01h	/pci/tags/rel_1/rtl/
47	Known issues repaired	mihad	8017d 06h	/pci/tags/rel_1/rtl/
46	Include statement was enclosed in synosys translate off/on directive - repaired	mihad	8022d 01h	/pci/tags/rel_1/rtl/
45	Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image	mihad	8023d 06h	/pci/tags/rel_1/rtl/
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8168d 10h	/pci/tags/rel_1/rtl/
33	Added some testcases, removed un-needed fifo signals	mihad	8184d 06h	/pci/tags/rel_1/rtl/
32	Added include statement that was missing and causing errors	mihad	8192d 02h	/pci/tags/rel_1/rtl/
26	Modified testbench and fixed some bugs	mihad	8198d 01h	/pci/tags/rel_1/rtl/
23	* empty log message *	mihad	8216d 01h	/pci/tags/rel_1/rtl/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8216d 02h	/pci/tags/rel_1/rtl/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories pci

[/] [pci/] [tags/] [rel_1/] [rtl/] - Rev 60

Filtering Options