OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_10/] - Rev 63

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
63 Added additional testcase and changed rst name in BIST to trst mihad 7928d 12h /pci/tags/rel_10/
62 Added BIST signals for RAMs. mihad 7931d 05h /pci/tags/rel_10/
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7939d 05h /pci/tags/rel_10/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7939d 06h /pci/tags/rel_10/
58 Removed all logic from asynchronous reset network mihad 7944d 07h /pci/tags/rel_10/
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7944d 13h /pci/tags/rel_10/
56 Number of state bits define was removed mihad 7945d 03h /pci/tags/rel_10/
55 Changed state machine encoding to true one-hot mihad 7945d 04h /pci/tags/rel_10/
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7978d 06h /pci/tags/rel_10/
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7978d 09h /pci/tags/rel_10/
52 Oops, never before noticed that OC header is missing mihad 7978d 13h /pci/tags/rel_10/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7978d 13h /pci/tags/rel_10/
50 Got rid of undef directives mihad 7981d 06h /pci/tags/rel_10/
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7981d 06h /pci/tags/rel_10/
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7981d 06h /pci/tags/rel_10/
47 Known issues repaired mihad 7981d 12h /pci/tags/rel_10/
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 7986d 06h /pci/tags/rel_10/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 7987d 11h /pci/tags/rel_10/
44 Added for testing of Configuration Cycles Type 1 mihad 7987d 12h /pci/tags/rel_10/
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 7987d 12h /pci/tags/rel_10/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.