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[/] [pci/] [tags/] [rel_10/] [apps/] [crt/] - Rev 90

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Rev Log message Author Age Path
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7759d 22h /pci/tags/rel_10/apps/crt/
84 Changed vendor ID. mihad 7817d 18h /pci/tags/rel_10/apps/crt/
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7859d 18h /pci/tags/rel_10/apps/crt/
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7862d 17h /pci/tags/rel_10/apps/crt/
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7865d 18h /pci/tags/rel_10/apps/crt/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7978d 19h /pci/tags/rel_10/apps/crt/
31 User defined constants used for Test Application tadej 8198d 14h /pci/tags/rel_10/apps/crt/
29 Xilinx synthesys log file tadej 8199d 01h /pci/tags/rel_10/apps/crt/
25 *** empty log message *** mihad 8219d 17h /pci/tags/rel_10/apps/crt/
21 Repaired a few bugs, updated specification, added test bench files and design document mihad 8219d 19h /pci/tags/rel_10/apps/crt/
14 *** empty log message *** mihad 8219d 21h /pci/tags/rel_10/apps/crt/
2 New project directory structure mihad 8341d 19h /pci/tags/rel_10/apps/crt/

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