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[/] [pci/] [tags/] [rel_10/] [rtl/] - Rev 59

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Rev Log message Author Age Path
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7954d 14h /pci/tags/rel_10/rtl/
58 Removed all logic from asynchronous reset network mihad 7959d 14h /pci/tags/rel_10/rtl/
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7959d 20h /pci/tags/rel_10/rtl/
56 Number of state bits define was removed mihad 7960d 11h /pci/tags/rel_10/rtl/
55 Changed state machine encoding to true one-hot mihad 7960d 12h /pci/tags/rel_10/rtl/
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7993d 17h /pci/tags/rel_10/rtl/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7993d 21h /pci/tags/rel_10/rtl/
50 Got rid of undef directives mihad 7996d 13h /pci/tags/rel_10/rtl/
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7996d 13h /pci/tags/rel_10/rtl/
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7996d 13h /pci/tags/rel_10/rtl/
47 Known issues repaired mihad 7996d 19h /pci/tags/rel_10/rtl/
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 8001d 14h /pci/tags/rel_10/rtl/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8002d 19h /pci/tags/rel_10/rtl/
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8147d 23h /pci/tags/rel_10/rtl/
33 Added some testcases, removed un-needed fifo signals mihad 8163d 18h /pci/tags/rel_10/rtl/
32 Added include statement that was missing and causing errors mihad 8171d 15h /pci/tags/rel_10/rtl/
26 Modified testbench and fixed some bugs mihad 8177d 14h /pci/tags/rel_10/rtl/
23 *** empty log message *** mihad 8195d 14h /pci/tags/rel_10/rtl/
21 Repaired a few bugs, updated specification, added test bench files and design document mihad 8195d 15h /pci/tags/rel_10/rtl/
19 *** empty log message *** mihad 8195d 15h /pci/tags/rel_10/rtl/

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