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[/] [pci/] [tags/] [rel_10/] [rtl/] - Rev 77

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Rev Log message Author Age Path
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7861d 20h /pci/tags/rel_10/rtl/
73 Bug fixes, testcases added. mihad 7867d 21h /pci/tags/rel_10/rtl/
72 *** empty log message *** mihad 7915d 01h /pci/tags/rel_10/rtl/
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.
mihad 7922d 17h /pci/tags/rel_10/rtl/
69 Changed BIST signal names etc.. mihad 7960d 00h /pci/tags/rel_10/rtl/
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7963d 10h /pci/tags/rel_10/rtl/
67 Changed BIST signals for RAMs. tadejm 7963d 14h /pci/tags/rel_10/rtl/
66 Changed empty status generation in pciw_fifo_control.v mihad 7967d 01h /pci/tags/rel_10/rtl/
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 7969d 23h /pci/tags/rel_10/rtl/
63 Added additional testcase and changed rst name in BIST to trst mihad 7970d 03h /pci/tags/rel_10/rtl/
62 Added BIST signals for RAMs. mihad 7972d 20h /pci/tags/rel_10/rtl/
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7980d 20h /pci/tags/rel_10/rtl/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7980d 21h /pci/tags/rel_10/rtl/
58 Removed all logic from asynchronous reset network mihad 7985d 21h /pci/tags/rel_10/rtl/
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7986d 03h /pci/tags/rel_10/rtl/
56 Number of state bits define was removed mihad 7986d 18h /pci/tags/rel_10/rtl/
55 Changed state machine encoding to true one-hot mihad 7986d 19h /pci/tags/rel_10/rtl/
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 8020d 00h /pci/tags/rel_10/rtl/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 8020d 04h /pci/tags/rel_10/rtl/
50 Got rid of undef directives mihad 8022d 20h /pci/tags/rel_10/rtl/

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