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[/] [pci/] [tags/] [rel_10/] [rtl/] - Rev 94

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Rev Log message Author Age Path
94 Changed one critical PCI bus signal logic. mihad 7676d 04h /pci/tags/rel_10/rtl/
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.
mihad 7754d 01h /pci/tags/rel_10/rtl/
86 Entered the option to disable no response counter in wb master. mihad 7765d 23h /pci/tags/rel_10/rtl/
83 Cleaned up the code. No functional changes. mihad 7794d 20h /pci/tags/rel_10/rtl/
81 Updated synchronization in top level fifo modules. mihad 7808d 16h /pci/tags/rel_10/rtl/
79 Updated. mihad 7811d 21h /pci/tags/rel_10/rtl/
78 Old files with wrong names removed. mihad 7811d 21h /pci/tags/rel_10/rtl/
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7811d 21h /pci/tags/rel_10/rtl/
73 Bug fixes, testcases added. mihad 7817d 22h /pci/tags/rel_10/rtl/
72 *** empty log message *** mihad 7865d 02h /pci/tags/rel_10/rtl/
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.
mihad 7872d 18h /pci/tags/rel_10/rtl/
69 Changed BIST signal names etc.. mihad 7910d 01h /pci/tags/rel_10/rtl/
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7913d 11h /pci/tags/rel_10/rtl/
67 Changed BIST signals for RAMs. tadejm 7913d 15h /pci/tags/rel_10/rtl/
66 Changed empty status generation in pciw_fifo_control.v mihad 7917d 02h /pci/tags/rel_10/rtl/
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 7920d 00h /pci/tags/rel_10/rtl/
63 Added additional testcase and changed rst name in BIST to trst mihad 7920d 04h /pci/tags/rel_10/rtl/
62 Added BIST signals for RAMs. mihad 7922d 21h /pci/tags/rel_10/rtl/
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7930d 21h /pci/tags/rel_10/rtl/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7930d 22h /pci/tags/rel_10/rtl/

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