URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_13/] [rtl/] - Rev 106

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
106	Added limited WISHBONE B3 support for WISHBONE Slave Unit. Doesn't support full speed bursts yet.	mihad	7673d 00h	/pci/tags/rel_13/rtl/
104	Found and simulated the problem in the synchronization logic. Repaired the synchronization logic in the FIFOs.	mihad	7678d 10h	/pci/tags/rel_13/rtl/
94	Changed one critical PCI bus signal logic.	mihad	7725d 08h	/pci/tags/rel_13/rtl/
88	Added the reset value parameter to the synchronizer flop module. Added resets to all synchronizer flop instances. Repaired initial sync value in fifos.	mihad	7803d 05h	/pci/tags/rel_13/rtl/
86	Entered the option to disable no response counter in wb master.	mihad	7815d 03h	/pci/tags/rel_13/rtl/
83	Cleaned up the code. No functional changes.	mihad	7844d 00h	/pci/tags/rel_13/rtl/
81	Updated synchronization in top level fifo modules.	mihad	7857d 20h	/pci/tags/rel_13/rtl/
79	Updated.	mihad	7861d 01h	/pci/tags/rel_13/rtl/
78	Old files with wrong names removed.	mihad	7861d 02h	/pci/tags/rel_13/rtl/
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7861d 02h	/pci/tags/rel_13/rtl/
73	Bug fixes, testcases added.	mihad	7867d 02h	/pci/tags/rel_13/rtl/
72	* empty log message *	mihad	7914d 06h	/pci/tags/rel_13/rtl/
71	Changed the code a bit to make it more readable. Functionality not changed in any way. More robust synchronization in fifos is still pending.	mihad	7921d 22h	/pci/tags/rel_13/rtl/
69	Changed BIST signal names etc..	mihad	7959d 05h	/pci/tags/rel_13/rtl/
68	Changed wrong signal name scanb_sen into scanb_en.	tadejm	7962d 15h	/pci/tags/rel_13/rtl/
67	Changed BIST signals for RAMs.	tadejm	7962d 20h	/pci/tags/rel_13/rtl/
66	Changed empty status generation in pciw_fifo_control.v	mihad	7966d 06h	/pci/tags/rel_13/rtl/
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7969d 04h	/pci/tags/rel_13/rtl/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7969d 08h	/pci/tags/rel_13/rtl/
62	Added BIST signals for RAMs.	mihad	7972d 01h	/pci/tags/rel_13/rtl/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories pci

[/] [pci/] [tags/] [rel_13/] [rtl/] - Rev 106

Filtering Options