URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_2/] - Rev 30

Rev	Log message	Author	Age	Path
30	Example of PCI testbench log file	mihad	8164d 03h	/pci/tags/rel_2/
29	Xilinx synthesys log file	tadej	8164d 06h	/pci/tags/rel_2/
28	pci/doc/pci_databook.pdf	tadej	8165d 00h	/pci/tags/rel_2/
27	Modified testbench and fixed some bugs	mihad	8166d 22h	/pci/tags/rel_2/
26	Modified testbench and fixed some bugs	mihad	8166d 22h	/pci/tags/rel_2/
25	* empty log message *	mihad	8184d 21h	/pci/tags/rel_2/
24	* empty log message *	mihad	8184d 21h	/pci/tags/rel_2/
23	* empty log message *	mihad	8184d 23h	/pci/tags/rel_2/
22	Added short description for simulation running	mihad	8184d 23h	/pci/tags/rel_2/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8185d 00h	/pci/tags/rel_2/
20	* empty log message *	mihad	8185d 00h	/pci/tags/rel_2/
19	* empty log message *	mihad	8185d 00h	/pci/tags/rel_2/
18	* empty log message *	mihad	8185d 00h	/pci/tags/rel_2/
17	* empty log message *	mihad	8185d 01h	/pci/tags/rel_2/
16	Import of various scripts for simulation running	mihad	8185d 01h	/pci/tags/rel_2/
15	Initial testbench import. Still under development	mihad	8185d 01h	/pci/tags/rel_2/
14	* empty log message *	mihad	8185d 01h	/pci/tags/rel_2/
13	Added separate software directory to the project	mihad	8185d 01h	/pci/tags/rel_2/
12	PCI IP Core Introduction	mihad	8186d 21h	/pci/tags/rel_2/
11	Initial design document release	mihad	8186d 21h	/pci/tags/rel_2/