URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] - Rev 34

Rev	Log message	Author	Age	Path
34	Added missing include statements	mihad	8161d 19h	/pci/tags/rel_3/
33	Added some testcases, removed un-needed fifo signals	mihad	8162d 17h	/pci/tags/rel_3/
32	Added include statement that was missing and causing errors	mihad	8170d 13h	/pci/tags/rel_3/
31	User defined constants used for Test Application	tadej	8173d 08h	/pci/tags/rel_3/
30	Example of PCI testbench log file	mihad	8173d 16h	/pci/tags/rel_3/
29	Xilinx synthesys log file	tadej	8173d 19h	/pci/tags/rel_3/
28	pci/doc/pci_databook.pdf	tadej	8174d 14h	/pci/tags/rel_3/
27	Modified testbench and fixed some bugs	mihad	8176d 11h	/pci/tags/rel_3/
26	Modified testbench and fixed some bugs	mihad	8176d 12h	/pci/tags/rel_3/
25	* empty log message *	mihad	8194d 10h	/pci/tags/rel_3/
24	* empty log message *	mihad	8194d 11h	/pci/tags/rel_3/
23	* empty log message *	mihad	8194d 12h	/pci/tags/rel_3/
22	Added short description for simulation running	mihad	8194d 13h	/pci/tags/rel_3/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8194d 13h	/pci/tags/rel_3/
20	* empty log message *	mihad	8194d 13h	/pci/tags/rel_3/
19	* empty log message *	mihad	8194d 13h	/pci/tags/rel_3/
18	* empty log message *	mihad	8194d 14h	/pci/tags/rel_3/
17	* empty log message *	mihad	8194d 14h	/pci/tags/rel_3/
16	Import of various scripts for simulation running	mihad	8194d 15h	/pci/tags/rel_3/
15	Initial testbench import. Still under development	mihad	8194d 15h	/pci/tags/rel_3/