URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_5/] - Rev 34

Rev	Log message	Author	Age	Path
34	Added missing include statements	mihad	8162d 20h	/pci/tags/rel_5/
33	Added some testcases, removed un-needed fifo signals	mihad	8163d 17h	/pci/tags/rel_5/
32	Added include statement that was missing and causing errors	mihad	8171d 14h	/pci/tags/rel_5/
31	User defined constants used for Test Application	tadej	8174d 09h	/pci/tags/rel_5/
30	Example of PCI testbench log file	mihad	8174d 17h	/pci/tags/rel_5/
29	Xilinx synthesys log file	tadej	8174d 20h	/pci/tags/rel_5/
28	pci/doc/pci_databook.pdf	tadej	8175d 15h	/pci/tags/rel_5/
27	Modified testbench and fixed some bugs	mihad	8177d 12h	/pci/tags/rel_5/
26	Modified testbench and fixed some bugs	mihad	8177d 13h	/pci/tags/rel_5/
25	* empty log message *	mihad	8195d 11h	/pci/tags/rel_5/
24	* empty log message *	mihad	8195d 12h	/pci/tags/rel_5/
23	* empty log message *	mihad	8195d 13h	/pci/tags/rel_5/
22	Added short description for simulation running	mihad	8195d 13h	/pci/tags/rel_5/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8195d 14h	/pci/tags/rel_5/
20	* empty log message *	mihad	8195d 14h	/pci/tags/rel_5/
19	* empty log message *	mihad	8195d 14h	/pci/tags/rel_5/
18	* empty log message *	mihad	8195d 15h	/pci/tags/rel_5/
17	* empty log message *	mihad	8195d 15h	/pci/tags/rel_5/
16	Import of various scripts for simulation running	mihad	8195d 15h	/pci/tags/rel_5/
15	Initial testbench import. Still under development	mihad	8195d 16h	/pci/tags/rel_5/