URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_5/] - Rev 38

Rev	Log message	Author	Age	Path
38	This file is not needed	tadej	8171d 20h	/pci/tags/rel_5/
37	These files are not needed any more	tadej	8171d 20h	/pci/tags/rel_5/
36	* empty log message *	tadej	8171d 21h	/pci/tags/rel_5/
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8226d 04h	/pci/tags/rel_5/
34	Added missing include statements	mihad	8241d 02h	/pci/tags/rel_5/
33	Added some testcases, removed un-needed fifo signals	mihad	8242d 00h	/pci/tags/rel_5/
32	Added include statement that was missing and causing errors	mihad	8249d 20h	/pci/tags/rel_5/
31	User defined constants used for Test Application	tadej	8252d 15h	/pci/tags/rel_5/
30	Example of PCI testbench log file	mihad	8252d 23h	/pci/tags/rel_5/
29	Xilinx synthesys log file	tadej	8253d 02h	/pci/tags/rel_5/
28	pci/doc/pci_databook.pdf	tadej	8253d 21h	/pci/tags/rel_5/
27	Modified testbench and fixed some bugs	mihad	8255d 18h	/pci/tags/rel_5/
26	Modified testbench and fixed some bugs	mihad	8255d 19h	/pci/tags/rel_5/
25	* empty log message *	mihad	8273d 18h	/pci/tags/rel_5/
24	* empty log message *	mihad	8273d 18h	/pci/tags/rel_5/
23	* empty log message *	mihad	8273d 19h	/pci/tags/rel_5/
22	Added short description for simulation running	mihad	8273d 20h	/pci/tags/rel_5/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8273d 20h	/pci/tags/rel_5/
20	* empty log message *	mihad	8273d 20h	/pci/tags/rel_5/
19	* empty log message *	mihad	8273d 20h	/pci/tags/rel_5/