URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_5/] [rtl/] - Rev 77

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7819d 12h	/pci/tags/rel_5/rtl/
73	Bug fixes, testcases added.	mihad	7825d 13h	/pci/tags/rel_5/rtl/
72	* empty log message *	mihad	7872d 17h	/pci/tags/rel_5/rtl/
71	Changed the code a bit to make it more readable. Functionality not changed in any way. More robust synchronization in fifos is still pending.	mihad	7880d 09h	/pci/tags/rel_5/rtl/
69	Changed BIST signal names etc..	mihad	7917d 16h	/pci/tags/rel_5/rtl/
68	Changed wrong signal name scanb_sen into scanb_en.	tadejm	7921d 02h	/pci/tags/rel_5/rtl/
67	Changed BIST signals for RAMs.	tadejm	7921d 06h	/pci/tags/rel_5/rtl/
66	Changed empty status generation in pciw_fifo_control.v	mihad	7924d 17h	/pci/tags/rel_5/rtl/
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7927d 15h	/pci/tags/rel_5/rtl/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7927d 19h	/pci/tags/rel_5/rtl/
62	Added BIST signals for RAMs.	mihad	7930d 12h	/pci/tags/rel_5/rtl/
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7938d 12h	/pci/tags/rel_5/rtl/
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7938d 13h	/pci/tags/rel_5/rtl/
58	Removed all logic from asynchronous reset network	mihad	7943d 13h	/pci/tags/rel_5/rtl/
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7943d 19h	/pci/tags/rel_5/rtl/
56	Number of state bits define was removed	mihad	7944d 10h	/pci/tags/rel_5/rtl/
55	Changed state machine encoding to true one-hot	mihad	7944d 11h	/pci/tags/rel_5/rtl/
53	Updated for synthesis purposes. Gate level simulation was failing in some configurations	mihad	7977d 16h	/pci/tags/rel_5/rtl/
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	7977d 20h	/pci/tags/rel_5/rtl/
50	Got rid of undef directives	mihad	7980d 12h	/pci/tags/rel_5/rtl/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories pci

[/] [pci/] [tags/] [rel_5/] [rtl/] - Rev 77

Filtering Options