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[/] [pci/] [tags/] [rel_6/] - Rev 49

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Rev Log message Author Age Path
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7994d 12h /pci/tags/rel_6/
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7994d 12h /pci/tags/rel_6/
47 Known issues repaired mihad 7994d 17h /pci/tags/rel_6/
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 7999d 12h /pci/tags/rel_6/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8000d 17h /pci/tags/rel_6/
44 Added for testing of Configuration Cycles Type 1 mihad 8000d 18h /pci/tags/rel_6/
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 8000d 18h /pci/tags/rel_6/
42 Removed out of date files mihad 8012d 18h /pci/tags/rel_6/
40 From these Wrod files PDF were created - added future improvements tadej 8091d 09h /pci/tags/rel_6/
39 File not needed tadej 8091d 10h /pci/tags/rel_6/
38 This file is not needed tadej 8091d 13h /pci/tags/rel_6/
37 These files are not needed any more tadej 8091d 13h /pci/tags/rel_6/
36 *** empty log message *** tadej 8091d 14h /pci/tags/rel_6/
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8145d 21h /pci/tags/rel_6/
34 Added missing include statements mihad 8160d 19h /pci/tags/rel_6/
33 Added some testcases, removed un-needed fifo signals mihad 8161d 17h /pci/tags/rel_6/
32 Added include statement that was missing and causing errors mihad 8169d 13h /pci/tags/rel_6/
31 User defined constants used for Test Application tadej 8172d 08h /pci/tags/rel_6/
30 Example of PCI testbench log file mihad 8172d 16h /pci/tags/rel_6/
29 Xilinx synthesys log file tadej 8172d 19h /pci/tags/rel_6/

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