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[/] [pci/] [tags/] [rel_6/] - Rev 65

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Rev Log message Author Age Path
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 7932d 09h /pci/tags/rel_6/
64 The testcase I just added in previous revision repaired mihad 7932d 12h /pci/tags/rel_6/
63 Added additional testcase and changed rst name in BIST to trst mihad 7932d 14h /pci/tags/rel_6/
62 Added BIST signals for RAMs. mihad 7935d 06h /pci/tags/rel_6/
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7943d 06h /pci/tags/rel_6/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7943d 08h /pci/tags/rel_6/
58 Removed all logic from asynchronous reset network mihad 7948d 08h /pci/tags/rel_6/
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7948d 14h /pci/tags/rel_6/
56 Number of state bits define was removed mihad 7949d 05h /pci/tags/rel_6/
55 Changed state machine encoding to true one-hot mihad 7949d 05h /pci/tags/rel_6/
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7982d 07h /pci/tags/rel_6/
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7982d 10h /pci/tags/rel_6/
52 Oops, never before noticed that OC header is missing mihad 7982d 14h /pci/tags/rel_6/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7982d 15h /pci/tags/rel_6/
50 Got rid of undef directives mihad 7985d 07h /pci/tags/rel_6/
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7985d 07h /pci/tags/rel_6/
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7985d 07h /pci/tags/rel_6/
47 Known issues repaired mihad 7985d 13h /pci/tags/rel_6/
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 7990d 07h /pci/tags/rel_6/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 7991d 13h /pci/tags/rel_6/

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