URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] - Rev 39

Rev	Log message	Author	Age	Path
39	File not needed	tadej	8078d 13h	/pci/tags/rel_7/
38	This file is not needed	tadej	8078d 16h	/pci/tags/rel_7/
37	These files are not needed any more	tadej	8078d 16h	/pci/tags/rel_7/
36	* empty log message *	tadej	8078d 17h	/pci/tags/rel_7/
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8133d 00h	/pci/tags/rel_7/
34	Added missing include statements	mihad	8147d 22h	/pci/tags/rel_7/
33	Added some testcases, removed un-needed fifo signals	mihad	8148d 20h	/pci/tags/rel_7/
32	Added include statement that was missing and causing errors	mihad	8156d 16h	/pci/tags/rel_7/
31	User defined constants used for Test Application	tadej	8159d 11h	/pci/tags/rel_7/
30	Example of PCI testbench log file	mihad	8159d 20h	/pci/tags/rel_7/
29	Xilinx synthesys log file	tadej	8159d 22h	/pci/tags/rel_7/
28	pci/doc/pci_databook.pdf	tadej	8160d 17h	/pci/tags/rel_7/
27	Modified testbench and fixed some bugs	mihad	8162d 14h	/pci/tags/rel_7/
26	Modified testbench and fixed some bugs	mihad	8162d 15h	/pci/tags/rel_7/
25	* empty log message *	mihad	8180d 14h	/pci/tags/rel_7/
24	* empty log message *	mihad	8180d 14h	/pci/tags/rel_7/
23	* empty log message *	mihad	8180d 16h	/pci/tags/rel_7/
22	Added short description for simulation running	mihad	8180d 16h	/pci/tags/rel_7/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8180d 16h	/pci/tags/rel_7/
20	* empty log message *	mihad	8180d 16h	/pci/tags/rel_7/