URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] - Rev 48

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Rev	Log message	Author	Age	Path
48	Extracted distributed RAM module from wb/pci_tpram.v to its own file	mihad	8023d 17h	/pci/tags/rel_7/
47	Known issues repaired	mihad	8023d 23h	/pci/tags/rel_7/
46	Include statement was enclosed in synosys translate off/on directive - repaired	mihad	8028d 17h	/pci/tags/rel_7/
45	Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image	mihad	8029d 23h	/pci/tags/rel_7/
44	Added for testing of Configuration Cycles Type 1	mihad	8030d 00h	/pci/tags/rel_7/
43	Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device	mihad	8030d 00h	/pci/tags/rel_7/
42	Removed out of date files	mihad	8042d 00h	/pci/tags/rel_7/
40	From these Wrod files PDF were created - added future improvements	tadej	8120d 15h	/pci/tags/rel_7/
39	File not needed	tadej	8120d 15h	/pci/tags/rel_7/
38	This file is not needed	tadej	8120d 18h	/pci/tags/rel_7/
37	These files are not needed any more	tadej	8120d 18h	/pci/tags/rel_7/
36	* empty log message *	tadej	8120d 19h	/pci/tags/rel_7/
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8175d 03h	/pci/tags/rel_7/
34	Added missing include statements	mihad	8190d 01h	/pci/tags/rel_7/
33	Added some testcases, removed un-needed fifo signals	mihad	8190d 22h	/pci/tags/rel_7/
32	Added include statement that was missing and causing errors	mihad	8198d 19h	/pci/tags/rel_7/
31	User defined constants used for Test Application	tadej	8201d 14h	/pci/tags/rel_7/
30	Example of PCI testbench log file	mihad	8201d 22h	/pci/tags/rel_7/
29	Xilinx synthesys log file	tadej	8202d 01h	/pci/tags/rel_7/
28	pci/doc/pci_databook.pdf	tadej	8202d 20h	/pci/tags/rel_7/

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Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] - Rev 48

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