URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_8/] - Rev 39

Rev	Log message	Author	Age	Path
39	File not needed	tadej	8078d 14h	/pci/tags/rel_8/
38	This file is not needed	tadej	8078d 17h	/pci/tags/rel_8/
37	These files are not needed any more	tadej	8078d 17h	/pci/tags/rel_8/
36	* empty log message *	tadej	8078d 18h	/pci/tags/rel_8/
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8133d 01h	/pci/tags/rel_8/
34	Added missing include statements	mihad	8148d 00h	/pci/tags/rel_8/
33	Added some testcases, removed un-needed fifo signals	mihad	8148d 21h	/pci/tags/rel_8/
32	Added include statement that was missing and causing errors	mihad	8156d 18h	/pci/tags/rel_8/
31	User defined constants used for Test Application	tadej	8159d 13h	/pci/tags/rel_8/
30	Example of PCI testbench log file	mihad	8159d 21h	/pci/tags/rel_8/
29	Xilinx synthesys log file	tadej	8159d 23h	/pci/tags/rel_8/
28	pci/doc/pci_databook.pdf	tadej	8160d 18h	/pci/tags/rel_8/
27	Modified testbench and fixed some bugs	mihad	8162d 16h	/pci/tags/rel_8/
26	Modified testbench and fixed some bugs	mihad	8162d 16h	/pci/tags/rel_8/
25	* empty log message *	mihad	8180d 15h	/pci/tags/rel_8/
24	* empty log message *	mihad	8180d 15h	/pci/tags/rel_8/
23	* empty log message *	mihad	8180d 17h	/pci/tags/rel_8/
22	Added short description for simulation running	mihad	8180d 17h	/pci/tags/rel_8/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8180d 17h	/pci/tags/rel_8/
20	* empty log message *	mihad	8180d 17h	/pci/tags/rel_8/