OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_WB_B3/] - Rev 96

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
96 Update! mihad 7674d 14h /pci/tags/rel_WB_B3/
95 Removed this file, because it was too large - long download time. mihad 7674d 14h /pci/tags/rel_WB_B3/
94 Changed one critical PCI bus signal logic. mihad 7674d 14h /pci/tags/rel_WB_B3/
93 Added a test application! mihad 7674d 21h /pci/tags/rel_WB_B3/
92 Update! mihad 7674d 21h /pci/tags/rel_WB_B3/
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7710d 11h /pci/tags/rel_WB_B3/
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7710d 11h /pci/tags/rel_WB_B3/
89 Burst 2 error fixed. mihad 7746d 12h /pci/tags/rel_WB_B3/
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.		 mihad 7752d 11h /pci/tags/rel_WB_B3/
87 Updated acording to RTL changes. mihad 7764d 08h /pci/tags/rel_WB_B3/
86 Entered the option to disable no response counter in wb master. mihad 7764d 08h /pci/tags/rel_WB_B3/
85 Changed Vendor ID defines. mihad 7764d 13h /pci/tags/rel_WB_B3/
84 Changed vendor ID. mihad 7768d 07h /pci/tags/rel_WB_B3/
83 Cleaned up the code. No functional changes. mihad 7793d 05h /pci/tags/rel_WB_B3/
81 Updated synchronization in top level fifo modules. mihad 7807d 02h /pci/tags/rel_WB_B3/
79 Updated. mihad 7810d 07h /pci/tags/rel_WB_B3/
78 Old files with wrong names removed. mihad 7810d 07h /pci/tags/rel_WB_B3/
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7810d 07h /pci/tags/rel_WB_B3/
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7813d 07h /pci/tags/rel_WB_B3/
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7816d 07h /pci/tags/rel_WB_B3/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.