URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [core/] [ds_dma64/] - Rev 54

Rev	Log message	Author	Age	Path
53	fixes #67 - correction ctrl_ram_cmd.vhd for Spartan6 (is_dsp48=0)	dsmv	3016d 02h	/pcie_ds_dma/trunk/core/ds_dma64/
50	ac701_a200t_core - correct	dsmv	3192d 07h	/pcie_ds_dma/trunk/core/ds_dma64/
49	Обновление IP Core - ISE 14.7	dsmv	3736d 10h	/pcie_ds_dma/trunk/core/ds_dma64/
48	Обновление IP Core	dsmv	3742d 13h	/pcie_ds_dma/trunk/core/ds_dma64/
47	Add files to ac701_a200t_core. No simulated.	dsmv	3764d 05h	/pcie_ds_dma/trunk/core/ds_dma64/
46	work on the project ac701_a200t_core	dsmv	3765d 06h	/pcie_ds_dma/trunk/core/ds_dma64/
42	add coregen_s6 - components for Spartan 6	dsmv	3958d 06h	/pcie_ds_dma/trunk/core/ds_dma64/
40	set wb_clk to 32 MHz	dsmv	3964d 06h	/pcie_ds_dma/trunk/core/ds_dma64/
38	sp605_lx45t_wishbone - correct reset, block_test_check, block_test_generate	dsmv	3971d 05h	/pcie_ds_dma/trunk/core/ds_dma64/
32	Set 125 MHz for wishbone bus. Data transfered from TEST_GEN to computer without errors.	dsmv	3996d 04h	/pcie_ds_dma/trunk/core/ds_dma64/
18	read block_id - ok	dsmv	4046d 02h	/pcie_ds_dma/trunk/core/ds_dma64/
17	ambpex5_sx50t_wishbone - simulation is ok	dsmv	4067d 05h	/pcie_ds_dma/trunk/core/ds_dma64/
11	fixed cpl_byte_count in core64_tx_engine_m4.vhd	dsmv	4075d 10h	/pcie_ds_dma/trunk/core/ds_dma64/
2	add files from project DS_DMA on ds-dev.ru	dsmv	4319d 14h	/pcie_ds_dma/trunk/core/ds_dma64/