URL https://opencores.org/ocsvn/pit/pit/trunk

Subversion Repositories pit

[/] [pit/] [trunk/] [rtl/] [verilog/] - Rev 13

Rev	Log message	Author	Age	Path
12	Fixed for single cycle reads	rehayes	5575d 13h	/pit/trunk/rtl/verilog/
10	Added SINGLE_CYCLE parameter for WISHBONE bus cycles	rehayes	5576d 16h	/pit/trunk/rtl/verilog/
9	fix problem with wb_wacc signal. Old method allowed data to be clocked into register twice.	rehayes	5582d 09h	/pit/trunk/rtl/verilog/
2	Initial Release March 14, 2009 - Bob Hayes	rehayes	5624d 13h	/pit/trunk/rtl/verilog/