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Rev Log message Author Age Path
120 Make generics "GENERIC" rhoads 7475d 13h /plasma/tags/V2_1/
119 Opcodes from count.c rhoads 7513d 23h /plasma/tags/V2_1/
118 Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7514d 00h /plasma/tags/V2_1/
117 Part of Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7514d 00h /plasma/tags/V2_1/
116 Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7514d 00h /plasma/tags/V2_1/
115 Matthias Grunewald's changes for Xilinx FPGA dual-port RAM. rhoads 7514d 00h /plasma/tags/V2_1/
114 Matthias Grunewald's changes to get synthesis to work with Synopsys' FPGA Compiler II. rhoads 7514d 00h /plasma/tags/V2_1/
113 Matthias Grunewald's bug fixes:
Branch and compare instructions didn't interpret immediate as signed.
rhoads 7514d 00h /plasma/tags/V2_1/
112 Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7514d 00h /plasma/tags/V2_1/
111 Updated to work with new convert.exe which updates opcodes to set $4, $5, and $sp. rhoads 7514d 00h /plasma/tags/V2_1/
110 support > 64kb memory with bss_start, bss_end, sp rhoads 7787d 20h /plasma/tags/V2_1/
109 support > 64kb memory with bss_start, bss_end, and sp rhoads 7787d 20h /plasma/tags/V2_1/
108 changed interrupt vector from 0x30 to 0x3c rhoads 7787d 20h /plasma/tags/V2_1/
107 merged rising_edge(clk) statements rhoads 7787d 20h /plasma/tags/V2_1/
106 better test mem_pause rhoads 7790d 22h /plasma/tags/V2_1/
105 better test mem_pause rhoads 7790d 23h /plasma/tags/V2_1/
104 use getchar() instead of getch() to be gcc friendly rhoads 7791d 22h /plasma/tags/V2_1/
103 shorten similation times rhoads 7791d 22h /plasma/tags/V2_1/
102 permit testing mem_pause rhoads 7791d 22h /plasma/tags/V2_1/
101 Correctly freeze the pipeline when mem_pause = '1' rhoads 7791d 22h /plasma/tags/V2_1/

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