URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [tags/] [V2_1/] [vhdl/] - Rev 49

Rev	Log message	Author	Age	Path
49	Fix pause while writting	rhoads	8106d 03h	/plasma/tags/V2_1/vhdl/
48	Altera	rhoads	8106d 03h	/plasma/tags/V2_1/vhdl/
47	Altera	rhoads	8113d 04h	/plasma/tags/V2_1/vhdl/
46	Comments cleanup	rhoads	8113d 05h	/plasma/tags/V2_1/vhdl/
45	Fixed signed 64-bit multiply	rhoads	8190d 17h	/plasma/tags/V2_1/vhdl/
44	Fixed signed 64-bit multiply	rhoads	8190d 17h	/plasma/tags/V2_1/vhdl/
43	Renamed M-lite to Plasma	rhoads	8193d 04h	/plasma/tags/V2_1/vhdl/
41	Changed name to M-lite to avoid trademark issues.	rhoads	8225d 09h	/plasma/tags/V2_1/vhdl/
40	Added comments	rhoads	8225d 09h	/plasma/tags/V2_1/vhdl/
39	Changed name to M-lite to avoid trademark issues.	rhoads	8225d 10h	/plasma/tags/V2_1/vhdl/
25	opcodes target	rhoads	8250d 03h	/plasma/tags/V2_1/vhdl/
24	Disable interrupts upon reset.	rhoads	8250d 03h	/plasma/tags/V2_1/vhdl/
23	Fixed div -x/y.	rhoads	8250d 03h	/plasma/tags/V2_1/vhdl/
19	Changed simili run to 40us.	rhoads	8252d 03h	/plasma/tags/V2_1/vhdl/
18	Fixed "divu $3,$4". "Div $3,$4" still has bug if $3*$4<0.	rhoads	8252d 03h	/plasma/tags/V2_1/vhdl/
17	Fixed "blez $0,target". Made LWL=LW and SWL=SW. Changed tabs to spaces.	rhoads	8252d 03h	/plasma/tags/V2_1/vhdl/
13	Removed reg_bank configuration control	rhoads	8256d 03h	/plasma/tags/V2_1/vhdl/
12	Better support for dual-port memories, removed old method	rhoads	8256d 03h	/plasma/tags/V2_1/vhdl/
11	Added comment for DEBUG mode	rhoads	8256d 03h	/plasma/tags/V2_1/vhdl/
10	Add pause_in to process dependency, fixes "lw $4,0($4)"	rhoads	8256d 03h	/plasma/tags/V2_1/vhdl/