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[/] [plasma/] [trunk/] [vhdl/] - Rev 347

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Rev Log message Author Age Path
347 Xilinx ISE Project file rhoads 5748d 17h /plasma/trunk/vhdl/
346 Support optional 4KB cache rhoads 5785d 16h /plasma/trunk/vhdl/
345 Commented out optional mult speedup rhoads 5789d 13h /plasma/trunk/vhdl/
344 Fixed compiler warning rhoads 5789d 13h /plasma/trunk/vhdl/
343 Initial working cache rhoads 5789d 13h /plasma/trunk/vhdl/
337 Initial attempt at a cache rhoads 5794d 17h /plasma/trunk/vhdl/
335 Use enable signal for byte_we rhoads 5836d 12h /plasma/trunk/vhdl/
334 Short time for averaging read signal for 12.5 MHz case rhoads 5846d 11h /plasma/trunk/vhdl/
333 Updated Altera lpm_ram_dp usage for Cyclone FPGAs rhoads 5846d 11h /plasma/trunk/vhdl/
332 Updated Altera lpm_ram_dp rhoads 5846d 11h /plasma/trunk/vhdl/
331 Commented out unconnected signals rhoads 5907d 11h /plasma/trunk/vhdl/
329 Fix interrupt line comment rhoads 5998d 10h /plasma/trunk/vhdl/
288 Added Ethernet MAC with DMA rhoads 6125d 09h /plasma/trunk/vhdl/
287 Added ethernet and flash control rhoads 6125d 09h /plasma/trunk/vhdl/
286 Added eth_dma rhoads 6125d 09h /plasma/trunk/vhdl/
285 Added eth_dma rhoads 6125d 11h /plasma/trunk/vhdl/
284 Removed unsupported branch likely opcodes rhoads 6125d 11h /plasma/trunk/vhdl/
280 Fix comment rhoads 6142d 09h /plasma/trunk/vhdl/
279 Expand read buffer size to two characters rhoads 6142d 09h /plasma/trunk/vhdl/
278 Fix refresh bug rhoads 6142d 10h /plasma/trunk/vhdl/

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