URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] - Rev 364

Rev	Log message	Author	Age	Path
356	Added space to align text	rhoads	5587d 17h	/plasma/trunk/vhdl/
352		linus	5636d 10h	/plasma/trunk/vhdl/
350		root	5665d 05h	/plasma/trunk/vhdl/
348	Added comment for 32MB and 128MB DDR parts	rhoads	5696d 01h	/plasma/trunk/vhdl/
347	Xilinx ISE Project file	rhoads	5696d 01h	/plasma/trunk/vhdl/
346	Support optional 4KB cache	rhoads	5733d 01h	/plasma/trunk/vhdl/
345	Commented out optional mult speedup	rhoads	5736d 21h	/plasma/trunk/vhdl/
344	Fixed compiler warning	rhoads	5736d 21h	/plasma/trunk/vhdl/
343	Initial working cache	rhoads	5736d 21h	/plasma/trunk/vhdl/
337	Initial attempt at a cache	rhoads	5742d 02h	/plasma/trunk/vhdl/
335	Use enable signal for byte_we	rhoads	5783d 20h	/plasma/trunk/vhdl/
334	Short time for averaging read signal for 12.5 MHz case	rhoads	5793d 19h	/plasma/trunk/vhdl/
333	Updated Altera lpm_ram_dp usage for Cyclone FPGAs	rhoads	5793d 19h	/plasma/trunk/vhdl/
332	Updated Altera lpm_ram_dp	rhoads	5793d 19h	/plasma/trunk/vhdl/
331	Commented out unconnected signals	rhoads	5854d 20h	/plasma/trunk/vhdl/
329	Fix interrupt line comment	rhoads	5945d 18h	/plasma/trunk/vhdl/
288	Added Ethernet MAC with DMA	rhoads	6072d 18h	/plasma/trunk/vhdl/
287	Added ethernet and flash control	rhoads	6072d 18h	/plasma/trunk/vhdl/
286	Added eth_dma	rhoads	6072d 18h	/plasma/trunk/vhdl/
285	Added eth_dma	rhoads	6072d 19h	/plasma/trunk/vhdl/