OpenCores
URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] - Rev 431

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
429 Changed INIT bit length in RAM16X1D and RAM32X1D rhoads 3988d 11h /plasma/trunk/vhdl/
428 Fix mult bugs "0*-1" and "-5%12". rhoads 4003d 16h /plasma/trunk/vhdl/
404 Changed spacing rhoads 4741d 07h /plasma/trunk/vhdl/
403 Disable Ethernet and cache when simulating. rhoads 4741d 07h /plasma/trunk/vhdl/
397 Added RAM32X1D option rhoads 4875d 01h /plasma/trunk/vhdl/
391 Better fix for 0x8000000 * negative number rhoads 5027d 07h /plasma/trunk/vhdl/
390 Handle special case of signed mult of 0x80000000 and a negative number rhoads 5030d 06h /plasma/trunk/vhdl/
383 Permit up to 64KB internal RAM and updated cache code. rhoads 5037d 07h /plasma/trunk/vhdl/
377 Fix cache_we warning rhoads 5180d 13h /plasma/trunk/vhdl/
376 Add write_enable to sensitivity list for Altera rhoads 5180d 14h /plasma/trunk/vhdl/
374 Fixed comment rhoads 5226d 04h /plasma/trunk/vhdl/
371 rhoads 5375d 16h /plasma/trunk/vhdl/
370 Fix "SLTIU v0, a0, -4000" by making imm signed rhoads 5375d 17h /plasma/trunk/vhdl/
369 Simplify E_RX_CLK usage rhoads 5381d 04h /plasma/trunk/vhdl/
365 Added UNISIM comment rhoads 5439d 05h /plasma/trunk/vhdl/
356 Added space to align text rhoads 5491d 04h /plasma/trunk/vhdl/
352 linus 5539d 21h /plasma/trunk/vhdl/
350 root 5568d 16h /plasma/trunk/vhdl/
348 Added comment for 32MB and 128MB DDR parts rhoads 5599d 12h /plasma/trunk/vhdl/
347 Xilinx ISE Project file rhoads 5599d 12h /plasma/trunk/vhdl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.