OpenCores
URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] [potato/] - Rev 22

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
22 Fix the potato_get_badvaddr() macro skordal 3394d 18h /potato/
21 Upgrade the example design to use a 60 MHz system clock skordal 3394d 19h /potato/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3394d 19h /potato/
19 SHA256 benchmark: allow compiler to inline at will skordal 3394d 19h /potato/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3396d 19h /potato/
17 Improve detection of unaligned instructions skordal 3401d 02h /potato/
16 Correct grammar in source code comment skordal 3401d 02h /potato/
15 SHA256 benchmark: fix Makefile syntax error skordal 3407d 19h /potato/
14 Improve detection of invalid instructions skordal 3407d 19h /potato/
13 Add SHA256 benchmark code skordal 3408d 00h /potato/
12 Update example design with correct bug-report URL and testbenches skordal 3408d 02h /potato/
11 Correct FIFO file header skordal 3408d 02h /potato/
10 Add missing FIFO module skordal 3412d 20h /potato/
9 Remove dependency on a non-existent target in the Makefile skordal 3412d 20h /potato/
8 Clarify instruction ROM naming in the example design README skordal 3419d 22h /potato/
7 Add test design for the Nexys 4 board from Digilent skordal 3419d 23h /potato/
6 Add ISA tests skordal 3419d 23h /potato/
5 Update the README, remove .md extension skordal 3422d 04h /potato/
4 Add license skordal 3422d 04h /potato/
3 Fix bug reporting URL skordal 3422d 05h /potato/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.