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[/] [potato/] [branches/] - Rev 47

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Rev	Log message	Author	Age	Path
46	Remove branch: cache-playground	skordal	3290d 00h	/potato/branches/
44	Add instruction cache and use the WB adapter as dmem interface	skordal	3290d 01h	/potato/branches/
43	Improve instruction fetch logic	skordal	3290d 01h	/potato/branches/
42	Move check for stall from irq_asserted to exception_taken in EX stage	skordal	3290d 01h	/potato/branches/
41	Make continouous status register reads asynchronous	skordal	3290d 01h	/potato/branches/
40	Reduce example design clock frequency to 50 MHz - Also includes a minor change to make the address decoder/interconnect work better with burst transfers.	skordal	3290d 01h	/potato/branches/
39	Disable IRQs when handling exceptions	skordal	3290d 01h	/potato/branches/
38	Add "Hello World" test application	skordal	3290d 02h	/potato/branches/
37	Add macro to set the TOHOST register from C code	skordal	3290d 02h	/potato/branches/
33	Ensure correct read of CSR after stall	skordal	3290d 02h	/potato/branches/
32	Prevent jumping/branching when stalling	skordal	3292d 23h	/potato/branches/
31	Prevent flushing the pipeline if it is stalling	skordal	3293d 00h	/potato/branches/
30	Add testcase for a combination of instructions that fail when using cache	skordal	3295d 05h	/potato/branches/
29	Add reset functionality for the WB arbiter state machine	skordal	3298d 00h	/potato/branches/
27	Prevent exceptions from being taken while stalling	skordal	3304d 01h	/potato/branches/
25	Add placeholder cache modules and a wishbone arbiter	skordal	3306d 09h	/potato/branches/
23	Create branch to use for implementing a cache	skordal	3306d 22h	/potato/branches/
1	The project and the structure was created	root	3345d 13h	/potato/branches/

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