URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] [potato/] [tags/] [v0.1/] [example/] - Rev 47

Rev	Log message	Author	Age	Path
47	Tag version 0.1 of the Potato Processor	skordal	3277d 14h	/potato/tags/v0.1/example/
45	Merge branch cache-playground (r23-r30 and r34-r44) into trunk This primarily adds the following features the the processor: - A direct-mapped instruction cache with configurable cache line width and number of cache lines. - Various bug fixes for bugs that appeared when the processor could run instructions at full speed but had to stall for data. - A "Hello World" test application.	skordal	3280d 08h	/potato/trunk/example/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3297d 06h	/potato/trunk/example/
12	Update example design with correct bug-report URL and testbenches	skordal	3310d 13h	/potato/trunk/example/
8	Clarify instruction ROM naming in the example design README	skordal	3322d 10h	/potato/trunk/example/
7	Add test design for the Nexys 4 board from Digilent	skordal	3322d 10h	/potato/trunk/example/