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28 Add rudimentary User's manual skordal 3334d 05h /potato/trunk/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3334d 10h /potato/trunk/
24 Remove unused STRINGIFY macros skordal 3337d 04h /potato/trunk/
22 Fix the potato_get_badvaddr() macro skordal 3337d 04h /potato/trunk/
21 Upgrade the example design to use a 60 MHz system clock skordal 3337d 05h /potato/trunk/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3337d 05h /potato/trunk/
19 SHA256 benchmark: allow compiler to inline at will skordal 3337d 05h /potato/trunk/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3339d 05h /potato/trunk/
17 Improve detection of unaligned instructions skordal 3343d 12h /potato/trunk/
16 Correct grammar in source code comment skordal 3343d 12h /potato/trunk/
15 SHA256 benchmark: fix Makefile syntax error skordal 3350d 05h /potato/trunk/
14 Improve detection of invalid instructions skordal 3350d 05h /potato/trunk/
13 Add SHA256 benchmark code skordal 3350d 10h /potato/trunk/
12 Update example design with correct bug-report URL and testbenches skordal 3350d 12h /potato/trunk/
11 Correct FIFO file header skordal 3350d 12h /potato/trunk/
10 Add missing FIFO module skordal 3355d 06h /potato/trunk/
9 Remove dependency on a non-existent target in the Makefile skordal 3355d 06h /potato/trunk/
8 Clarify instruction ROM naming in the example design README skordal 3362d 08h /potato/trunk/
7 Add test design for the Nexys 4 board from Digilent skordal 3362d 09h /potato/trunk/
6 Add ISA tests skordal 3362d 09h /potato/trunk/

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