OpenCores
URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] [potato/] [trunk/] - Rev 32

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
28 Add rudimentary User's manual skordal 3314d 15h /potato/trunk/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3314d 20h /potato/trunk/
24 Remove unused STRINGIFY macros skordal 3317d 13h /potato/trunk/
22 Fix the potato_get_badvaddr() macro skordal 3317d 14h /potato/trunk/
21 Upgrade the example design to use a 60 MHz system clock skordal 3317d 14h /potato/trunk/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3317d 14h /potato/trunk/
19 SHA256 benchmark: allow compiler to inline at will skordal 3317d 14h /potato/trunk/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3319d 14h /potato/trunk/
17 Improve detection of unaligned instructions skordal 3323d 21h /potato/trunk/
16 Correct grammar in source code comment skordal 3323d 21h /potato/trunk/
15 SHA256 benchmark: fix Makefile syntax error skordal 3330d 14h /potato/trunk/
14 Improve detection of invalid instructions skordal 3330d 15h /potato/trunk/
13 Add SHA256 benchmark code skordal 3330d 19h /potato/trunk/
12 Update example design with correct bug-report URL and testbenches skordal 3330d 21h /potato/trunk/
11 Correct FIFO file header skordal 3330d 22h /potato/trunk/
10 Add missing FIFO module skordal 3335d 15h /potato/trunk/
9 Remove dependency on a non-existent target in the Makefile skordal 3335d 15h /potato/trunk/
8 Clarify instruction ROM naming in the example design README skordal 3342d 18h /potato/trunk/
7 Add test design for the Nexys 4 board from Digilent skordal 3342d 18h /potato/trunk/
6 Add ISA tests skordal 3342d 18h /potato/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.