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60 Remove out-of-date comment skordal 3390d 09h /potato/trunk/src/
58 Merge branch new-privileged-isa (r48-r57) into trunk

This adds support for the newly published supervisor extensions
version 1.7. In addition, a processor datasheet has been added
and the timer_clk signal has been properly connected in the
example design and the SoC testbench.		 skordal 3410d 13h /potato/trunk/src/
45 Merge branch cache-playground (r23-r30 and r34-r44) into trunk

This primarily adds the following features the the processor:
- A direct-mapped instruction cache with configurable cache line width and
number of cache lines.
- Various bug fixes for bugs that appeared when the processor could run
instructions at full speed but had to stall for data.
- A "Hello World" test application.		 skordal 3442d 08h /potato/trunk/src/
36 Ensure correct read of CSR after stall skordal 3442d 09h /potato/trunk/src/
35 Prevent jumping/branching when stalling skordal 3442d 09h /potato/trunk/src/
34 Prevent flushing the pipeline if it is stalling skordal 3442d 09h /potato/trunk/src/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3456d 12h /potato/trunk/src/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3461d 06h /potato/trunk/src/
17 Improve detection of unaligned instructions skordal 3465d 13h /potato/trunk/src/
14 Improve detection of invalid instructions skordal 3472d 07h /potato/trunk/src/
11 Correct FIFO file header skordal 3472d 13h /potato/trunk/src/
10 Add missing FIFO module skordal 3477d 07h /potato/trunk/src/
3 Fix bug reporting URL skordal 3486d 16h /potato/trunk/src/
2 Initial commit skordal 3486d 18h /potato/trunk/src/

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