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[/] [raptor64/] [trunk/] [rtl/] [verilog/] - Rev 42

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Rev Log message Author Age Path
42 - updated assembler, sample files, 32 bit ISA robfinch 4190d 02h /raptor64/trunk/rtl/verilog/
41 - change to 32 bit ISA robfinch 4190d 02h /raptor64/trunk/rtl/verilog/
33 - updated cpu files robfinch 4208d 22h /raptor64/trunk/rtl/verilog/
31 - added more smaller modules robfinch 4409d 11h /raptor64/trunk/rtl/verilog/
30 - separated out Branch History, regfile, and TLB robfinch 4411d 00h /raptor64/trunk/rtl/verilog/
29 - exception processing update robfinch 4413d 19h /raptor64/trunk/rtl/verilog/
25 - updated processor robfinch 4423d 18h /raptor64/trunk/rtl/verilog/
21 - fixes, loop, instruction buffer robfinch 4436d 16h /raptor64/trunk/rtl/verilog/
20 - more source changes robfinch 4440d 21h /raptor64/trunk/rtl/verilog/
19 - added instruction buffer for non-icache operation robfinch 4440d 21h /raptor64/trunk/rtl/verilog/
16 - working on interrupt hardware robfinch 4441d 20h /raptor64/trunk/rtl/verilog/
15 - disassembles opcodes for diagnostic dump robfinch 4442d 13h /raptor64/trunk/rtl/verilog/
14 - many changes
- removed cmd bus from sc version
-		 robfinch 4442d 13h /raptor64/trunk/rtl/verilog/
13 - single context (sc) version of cpu robfinch 4444d 18h /raptor64/trunk/rtl/verilog/
12 - updated for updated instruction set
- added WB ROM		 robfinch 4444d 18h /raptor64/trunk/rtl/verilog/
11 - fixes, changed branches around robfinch 4444d 18h /raptor64/trunk/rtl/verilog/
9 - added (2,2) branch predictor
- added more instruction dumps		 robfinch 4446d 00h /raptor64/trunk/rtl/verilog/
7 - diagnostic instruction dump robfinch 4446d 18h /raptor64/trunk/rtl/verilog/
6 - numerous fixes (work in progress) robfinch 4446d 18h /raptor64/trunk/rtl/verilog/
5 - numerous fixes (work in progress) robfinch 4446d 18h /raptor64/trunk/rtl/verilog/

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