URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

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[/] [raytrac/] - Rev 133

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Rev	Log message	Author	Age	Path
133	Added the instructions queue	jguarin2002	4677d 20h	/raytrac/
132	There was amiss in the cross product datapath decoder	jguarin2002	4681d 15h	/raytrac/
131	Post RTL check on memblock	jguarin2002	4681d 21h	/raytrac/
130	RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos	jguarin2002	4682d 15h	/raytrac/
129	Memory Block: Identified the four circuits: External Write, External Read, Internal Write, Internal Read.	jguarin2002	4688d 05h	/raytrac/
128	Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done	jguarin2002	4695d 07h	/raytrac/
127	Datapath Control Done	jguarin2002	4695d 19h	/raytrac/
126	dpc: Datapath Control Finished..... test it	jguarin2002	4699d 14h	/raytrac/
125	DPC the result is just left	jguarin2002	4700d 08h	/raytrac/
124	lost....	jguarin2002	4704d 08h	/raytrac/
123	Datapath Control	jguarin2002	4708d 07h	/raytrac/
122	Datapath Control for RaytracFP	jguarin2002	4710d 21h	/raytrac/
121	taking out std_logic_arith from sight.... no conversions allowed	jguarin2002	4713d 09h	/raytrac/
120	Beta 0 Adder LCELLS 373	jguarin2002	4719d 07h	/raytrac/
119	382 LEs Adder, RTL viewer Check Ok	jguarin2002	4719d 13h	/raytrac/
118	fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32	jguarin2002	4719d 20h	/raytrac/
117	Official reduction achieved 12%	jguarin2002	4720d 02h	/raytrac/
116	Official Reduction is 7%: Adder 420 logic cells, trying to reach out at least 20 less cells	jguarin2002	4720d 03h	/raytrac/
115	Official Reduction is about 7%	jguarin2002	4720d 03h	/raytrac/
114	lost of time..	jguarin2002	4721d 02h	/raytrac/

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[/] [raytrac/] - Rev 133

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