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[/] [raytrac/] - Rev 249

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Rev Log message Author Age Path
249 Using a register as a 66.5 MHZ timer counter jguarin2002 4281d 18h /raytrac/
248 Corrected an error on the normal jguarin2002 4290d 00h /raytrac/
247 Advance in application... but some normalization problems had popped up jguarin2002 4290d 16h /raytrac/
246 framework for conditional and accumulative operations DESCRIBED NOT IMPLEMENTED jguarin2002 4297d 04h /raytrac/
245 Avances pequenos en los documentos jguarin2002 4309d 23h /raytrac/
244 Changed the directory structure a little bit, there is now wide arith (which encapsulates in a single RTL 3 adders or 3 adders jguarin2002 4312d 21h /raytrac/
243 The Registers BASE+1, BASE+2, BASE+3 are used now for debugging purposes jguarin2002 4312d 21h /raytrac/
242 AS1 produced an unnoticed delay, the compiler geenerated an extra stage..... so a delay constant was added to sync this extra stage with the operation via ssync_chain jguarin2002 4312d 22h /raytrac/
241 fmul32 x 6 multipliers wide jguarin2002 4313d 18h /raytrac/
240 last minute correction jguarin2002 4313d 22h /raytrac/
239 wide multiplicator added to avoid optimization jguarin2002 4313d 22h /raytrac/
238 wide multiplicator added to avoid optimization jguarin2002 4313d 22h /raytrac/
237 corrected errors in raytrac.vhd jguarin2002 4314d 00h /raytrac/
236 Tunnning delay added to q0 queue jguarin2002 4314d 03h /raytrac/
235 Tunnning delay added to q0 queue jguarin2002 4314d 03h /raytrac/
234 raytrac update nothing major jguarin2002 4315d 03h /raytrac/
233 raytrac sopc component updated jguarin2002 4315d 03h /raytrac/
232 raytrac sopc component updated jguarin2002 4315d 03h /raytrac/
231 nfetch address counter implemented in a whole register for convinience jguarin2002 4315d 04h /raytrac/
230 RC 1.0 Previous rev(228), is functional and even more than this one, but is bigger and is for debugging jguarin2002 4320d 06h /raytrac/

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