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[/] [rio/] [branches/] [2.0.0-development/] [rtl/] [vhdl/] - Rev 40

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40 branches/singleSymbol: Updating testcases in TestRioSerial for fully synchronous RioSerial and correcting some bugs. magro732 3570d 16h /rio/branches/2.0.0-development/rtl/vhdl/
39 branches/singleSymbol: Backup-checkin (not compiling) of new RioWbBridge with 64-bit Wishbone interface. magro732 3577d 03h /rio/branches/2.0.0-development/rtl/vhdl/
38 RioLogicalCommon has working Maintenance-packet parsing.
TestRioLogicalCommon has test cases for all Maintenance request packets.
magro732 3597d 09h /rio/branches/2.0.0-development/rtl/vhdl/
37 singleSymbol: Correcting compiler errors and misc minor errors. magro732 3606d 04h /rio/branches/2.0.0-development/rtl/vhdl/
36 singleSymbol: Adding testbench for RioLogicalCommon. magro732 3613d 03h /rio/branches/2.0.0-development/rtl/vhdl/
35 Temporary checkin of new synchronous RioSerial. Does not work yet.
Temporary checkin of RioLogicalCommon. Does not work yet.
magro732 3616d 09h /rio/branches/2.0.0-development/rtl/vhdl/
34 Adding first version of logical egress. magro732 3620d 03h /rio/branches/2.0.0-development/rtl/vhdl/
33 Adding common logical layer module. magro732 3621d 08h /rio/branches/2.0.0-development/rtl/vhdl/
32 branches/singleSymbol
Adding a wait-state to only insert one control-symbol into an outbound packet.
magro732 3624d 11h /rio/branches/2.0.0-development/rtl/vhdl/
31 Fixing compiler errors.
Adding support for inserting control-symbols from receiver into frames.
magro732 3626d 12h /rio/branches/2.0.0-development/rtl/vhdl/
27 Adding missing code to single-symbol pipelined transmitter. Not tested nor copiled. magro732 3628d 02h /rio/branches/2.0.0-development/rtl/vhdl/
21 Branching of a single symbol version of the new RioSerial. magro732 3912d 02h /rio/branches/2.0.0-development/rtl/vhdl/
19 Removing synthesis warnings. magro732 4002d 04h /rio/branches/2.0.0-development/rtl/vhdl/
18 Making RioSerial entity the same as before+minor fixes. magro732 4003d 02h /rio/branches/2.0.0-development/rtl/vhdl/
17 Removing latch and improving timing. magro732 4004d 03h /rio/branches/2.0.0-development/rtl/vhdl/
16 Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing. magro732 4004d 03h /rio/branches/2.0.0-development/rtl/vhdl/
15 All testcases are ok. Still needs some tweeks though. magro732 4008d 04h /rio/branches/2.0.0-development/rtl/vhdl/
14 Most issues solved, testbench issues remains. magro732 4011d 03h /rio/branches/2.0.0-development/rtl/vhdl/
13 Timeouts are working. magro732 4014d 04h /rio/branches/2.0.0-development/rtl/vhdl/
12 Backup of recent work, debugging new RioSerial. magro732 4025d 03h /rio/branches/2.0.0-development/rtl/vhdl/

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