URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] [branches/] [parallelSymbols/] [rtl/] [vhdl/] - Rev 15

Rev	Log message	Author	Age	Path
15	All testcases are ok. Still needs some tweeks though.	magro732	4008d 07h	/rio/branches/parallelSymbols/rtl/vhdl/
14	Most issues solved, testbench issues remains.	magro732	4011d 06h	/rio/branches/parallelSymbols/rtl/vhdl/
13	Timeouts are working.	magro732	4014d 07h	/rio/branches/parallelSymbols/rtl/vhdl/
12	Backup of recent work, debugging new RioSerial.	magro732	4025d 06h	/rio/branches/parallelSymbols/rtl/vhdl/
11	Receiver ready, transmitter is compiling.	magro732	4025d 06h	/rio/branches/parallelSymbols/rtl/vhdl/
10	Branch to develop support for parallel symbols.	magro732	4025d 06h	/rio/branches/parallelSymbols/rtl/vhdl/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4066d 18h	/rio/branches/parallelSymbols/rtl/vhdl/
8	Adding signal descriptions in comments.	magro732	4110d 07h	/rio/branches/parallelSymbols/rtl/vhdl/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4197d 11h	/rio/branches/parallelSymbols/rtl/vhdl/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4197d 13h	/rio/branches/parallelSymbols/rtl/vhdl/
4	Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification.	magro732	4226d 19h	/rio/branches/parallelSymbols/rtl/vhdl/
3	Adding RioPacketBuffer and testbench.	magro732	4227d 11h	/rio/branches/parallelSymbols/rtl/vhdl/
2	Adding RioSwitch and testbench.	magro732	4227d 12h	/rio/branches/parallelSymbols/rtl/vhdl/