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[/] [rio/] [tags/] [2.0.0-alpha/] [rtl/] [vhdl/] - Rev 45

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Rev Log message Author Age Path
23 Tagging alpha release 2.0.0. magro732 3945d 01h /rio/tags/2.0.0-alpha/rtl/vhdl/
19 Removing synthesis warnings. magro732 4035d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
18 Making RioSerial entity the same as before+minor fixes. magro732 4036d 02h /rio/tags/2.0.0-alpha/rtl/vhdl/
17 Removing latch and improving timing. magro732 4037d 02h /rio/tags/2.0.0-alpha/rtl/vhdl/
16 Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing. magro732 4037d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
15 All testcases are ok. Still needs some tweeks though. magro732 4041d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
14 Most issues solved, testbench issues remains. magro732 4044d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
13 Timeouts are working. magro732 4047d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
12 Backup of recent work, debugging new RioSerial. magro732 4058d 02h /rio/tags/2.0.0-alpha/rtl/vhdl/
11 Receiver ready, transmitter is compiling. magro732 4058d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
10 Branch to develop support for parallel symbols. magro732 4058d 03h /rio/tags/2.0.0-alpha/rtl/vhdl/
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4099d 14h /rio/tags/2.0.0-alpha/rtl/vhdl/
8 Adding signal descriptions in comments. magro732 4143d 04h /rio/tags/2.0.0-alpha/rtl/vhdl/
7 Adding missing generic parameters to RioPacketBuffer. magro732 4230d 08h /rio/tags/2.0.0-alpha/rtl/vhdl/
6 Adding RioWbBridge. Sorry, no testbench for this one. magro732 4230d 10h /rio/tags/2.0.0-alpha/rtl/vhdl/
4 Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification. magro732 4259d 15h /rio/tags/2.0.0-alpha/rtl/vhdl/
3 Adding RioPacketBuffer and testbench. magro732 4260d 07h /rio/tags/2.0.0-alpha/rtl/vhdl/
2 Adding RioSwitch and testbench. magro732 4260d 09h /rio/tags/2.0.0-alpha/rtl/vhdl/

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