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[/] [rio/] [trunk/] [rtl/] [vhdl/] - Rev 30

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Rev Log message Author Age Path
28 Correcting bug in RioSwitch.vhd internal Wishbone interconnect.
Modifying an existing test case in TestRioSwitch.vhd to provoke the error.
magro732 3606d 00h /rio/trunk/rtl/vhdl/
25 Correcting compiler errors in TestRioPcsUart.vhd magro732 3774d 17h /rio/trunk/rtl/vhdl/
20 Adding software C-stack and matching VHDL modules. magro732 3956d 13h /rio/trunk/rtl/vhdl/
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4046d 00h /rio/trunk/rtl/vhdl/
8 Adding signal descriptions in comments. magro732 4089d 14h /rio/trunk/rtl/vhdl/
7 Adding missing generic parameters to RioPacketBuffer. magro732 4176d 17h /rio/trunk/rtl/vhdl/
6 Adding RioWbBridge. Sorry, no testbench for this one. magro732 4176d 19h /rio/trunk/rtl/vhdl/
4 Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification. magro732 4206d 01h /rio/trunk/rtl/vhdl/
3 Adding RioPacketBuffer and testbench. magro732 4206d 17h /rio/trunk/rtl/vhdl/
2 Adding RioSwitch and testbench. magro732 4206d 19h /rio/trunk/rtl/vhdl/

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