OpenCores
URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] [tools/] [bin/] - Rev 97

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
97 Changed hack to insert stall signal into the core (following OpenSPARC Internals book) fafa1971 5680d 07h /s1_core/trunk/tools/bin/
93 Now uses a local version of sparc.v with SPU instance removed by hand. fafa1971 5695d 13h /s1_core/trunk/tools/bin/
86 Added 'lain.ux'-style checks for environment vars to be set (I lost data as well!!!). fafa1971 5940d 13h /s1_core/trunk/tools/bin/
73 New version of scripts for DC and to compile boot code fafa1971 6063d 15h /s1_core/trunk/tools/bin/
71 Added check for S1_ROOT set (suggested by lain.ux) fafa1971 6070d 21h /s1_core/trunk/tools/bin/
70 Again, the setup file is linked rather than copied fafa1971 6078d 07h /s1_core/trunk/tools/bin/
67 Now uses XG/Tcl syntax fafa1971 6080d 07h /s1_core/trunk/tools/bin/
61 Updated to latest version fafa1971 6126d 05h /s1_core/trunk/tools/bin/
50 Changed library paths for XST from macrocell to behav. fafa1971 6228d 13h /s1_core/trunk/tools/bin/
49 Now supports 3 versions: S1 Core ME/SE/EE. fafa1971 6235d 14h /s1_core/trunk/tools/bin/
47 Updated with `define preprocessing for Xilinx XST synthesis fafa1971 6277d 04h /s1_core/trunk/tools/bin/
42 Added support for filelist for Xilinx ISE XST synthesis fafa1971 6278d 03h /s1_core/trunk/tools/bin/
41 Added copy of empty modules upon original SPARC copies fafa1971 6278d 03h /s1_core/trunk/tools/bin/
40 First version of synthesis script for Xilinx ISE XST fafa1971 6278d 03h /s1_core/trunk/tools/bin/
38 Changed to compile (for now) the boot code. fafa1971 6282d 02h /s1_core/trunk/tools/bin/
27 Added "tee" to see output both on screen and saved in the logfile. fafa1971 6292d 05h /s1_core/trunk/tools/bin/
26 Added "tee" commands to see the output both on screen and saved on logfile. fafa1971 6292d 05h /s1_core/trunk/tools/bin/
16 Added the 3 new defines to make the design:
- synthesizable for FPGA
- single-threaded
- without the cryptographic SPU unit
fafa1971 6292d 16h /s1_core/trunk/tools/bin/
15 Removed the remove of CVS subdirs... fafa1971 6292d 16h /s1_core/trunk/tools/bin/
7 First version. fafa1971 6374d 02h /s1_core/trunk/tools/bin/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.