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[/] [s1_core/] [trunk/] [tools/] [src/] - Rev 82

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Rev Log message Author Age Path
82 DC synthesis script modified according to the fabolous manual (RTFM...). fafa1971 5969d 07h /s1_core/trunk/tools/src/
81 Sorry, I made a mistake in the waveform of the clock! fafa1971 5969d 11h /s1_core/trunk/tools/src/
80 Hyerarchical report_area. fafa1971 5972d 06h /s1_core/trunk/tools/src/
78 Relaxed timing and added flatten command. fafa1971 5972d 07h /s1_core/trunk/tools/src/
76 Changed again from DB export to DDC export fafa1971 6072d 04h /s1_core/trunk/tools/src/
73 New version of scripts for DC and to compile boot code fafa1971 6072d 08h /s1_core/trunk/tools/src/
72 Modified RAM address from 0x400C0 to 0x4C000 fafa1971 6078d 15h /s1_core/trunk/tools/src/
69 Now contains also the other file fafa1971 6087d 00h /s1_core/trunk/tools/src/
68 Merged with the DC setup file fafa1971 6087d 00h /s1_core/trunk/tools/src/
66 Modified to use XG syntax fafa1971 6089d 00h /s1_core/trunk/tools/src/
65 Version with undisclosed library names fafa1971 6089d 01h /s1_core/trunk/tools/src/
64 Initial version
B
C
C
Initial versioNCVS: ----------------------------------------------------------------------		 fafa1971 6089d 01h /s1_core/trunk/tools/src/
63 *** empty log message *** fafa1971 6089d 01h /s1_core/trunk/tools/src/
60 Now supports also Virtex5 devices fafa1971 6134d 23h /s1_core/trunk/tools/src/
40 First version of synthesis script for Xilinx ISE XST fafa1971 6286d 21h /s1_core/trunk/tools/src/
39 Empty modules for cacheless Simply RISC S1 Core fafa1971 6286d 21h /s1_core/trunk/tools/src/
31 Removed list of formerly dirty signals, to improve waveforms readability. fafa1971 6300d 22h /s1_core/trunk/tools/src/
7 First version. fafa1971 6382d 20h /s1_core/trunk/tools/src/

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