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[/] [s6soc/] - Rev 12

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12 The UART and PWM audio now work. This includes the changes to make that
happen, as well as the source code for some UART and PWM demo programs.		 dgisselq 2969d 00h /s6soc/
11 Runs on hardware now! Added proper pinouts, pipelined wishbone command
interface sufficient for loading the flash, a loader to load the flash,
and verified that they work.		 dgisselq 2969d 22h /s6soc/
10 Added the capability to run ELF files natively, fully processing the ELF format. dgisselq 2969d 22h /s6soc/
9 Added pinout diagrams, based upon a (hopefully) final UCF file. dgisselq 2969d 22h /s6soc/
8 First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals.		 dgisselq 2974d 23h /s6soc/
7 Created/added an initial specification. Updated/corrected several copywrite
notices.		 dgisselq 2975d 13h /s6soc/
6 Initial UCF modifications. Pin layout still isn't complete, but I'm starting
to work it.		 dgisselq 2996d 08h /s6soc/
5 These two are my first attempt(s) at a secondary project file, one that can
run as an alternate to the main file but that gives more access to the hardware,
such as programming access to the flash.		 dgisselq 2996d 08h /s6soc/
4 Lots of updates, as part of actually making this work on hardware. Not there
yet, so this is still pre-alpha.		 dgisselq 2996d 08h /s6soc/
3 Updated date. dgisselq 2996d 08h /s6soc/
2 The initial check in--all the files that will make this SoC work. dgisselq 3007d 03h /s6soc/
1 The project and the structure was created root 3007d 05h /s6soc/

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