URL https://opencores.org/ocsvn/sata_controller_core/sata_controller_core/trunk

Subversion Repositories sata_controller_core

[/] [sata_controller_core/] - Rev 15

Rev	Log message	Author	Age	Path
15	Updated the configuration file for correct control register mapping. Bin	bhuang2	4047d 18h	/sata_controller_core/
14	Initial upload of block device driver for SATA core. To-do: Write a README file about how to build this device driver, testing methodology, etc. Bin Huang	bhuang2	4226d 10h	/sata_controller_core/
13	bug fix	ashwin_mendon	4341d 17h	/sata_controller_core/
12		ashwin_mendon	4353d 11h	/sata_controller_core/
11	added base_system	ashwin_mendon	4367d 20h	/sata_controller_core/
10		ashwin_mendon	4370d 18h	/sata_controller_core/
9		ashwin_mendon	4382d 13h	/sata_controller_core/
8		ashwin_mendon	4382d 13h	/sata_controller_core/
7	corrected	ashwin_mendon	4383d 18h	/sata_controller_core/
6	placeholders for PLB and driver directories	rsass	4416d 20h	/sata_controller_core/
5	put sata core with locallink interface in sata2_fifo dir	rsass	4416d 20h	/sata_controller_core/
4	Starting to reorganize for additional cores/source	rsass	4416d 20h	/sata_controller_core/
3	cleaned code	ashwin_mendon	4423d 10h	/sata_controller_core/
2	Added Source Files	ashwin_mendon	4430d 12h	/sata_controller_core/
1	The project and the structure was created	root	4466d 20h	/sata_controller_core/